ADC circuits have numerous applications. For example, T. Sugiki et al., A 60mW 10b CMOS Image Sensor With Column-to-Column FPN Reduction, ISSCC 2000 Session 6, Image Sensors, Paper MP 6.4 (Feb. 7, 2000) describes a CMOS image sensor with an ADC that includes a ramp generator.
Many other CMOS image sensors use a ramp ADC which is essentially a comparator and appropriate control logic. In many conventional ramp ADCs, an analog input voltage signal is compared with a gradually increasing reference voltage or “ramp” voltage. The ramp voltage can be generated by a digital-to-analog converter (“DAC”) as it sequences through and converts digital codes into analog voltages. In operation, when the ramp voltage reaches the value of the input signal, the comparator generates a signal that latches the digital code of the DAC. The latched digital code is provided as the ADC output.
It would be advantageous to have improved ramp generation techniques, particularly for ramp ADC circuitry performing readout from an integer array.